Functions and Tasks in SystemVerilog with conceptual examples

Low Pass RC Circuit as Integrator and Condition for Good Integration

High Pass RC Circuit as Differentiator and Condition for Good Differentiation

Clocking Regions and why race condition does not exist in SystemVerilog? (23 April 2020)

Solutions to SystemVerilog programs -1 (17th August 2020)

5 Importance of Clocking and Program Blocks, Why Race condition does not exist in SystemVerilog ?

4. Arbiter example with Simple Interfaces & Interfaces with Modports in SystemVerilog

3. Why testing is given more priority? Importance of test-bench and Interfaces

2. Functions and Tasks (call by reference) , automatic keyword, timescale in SystemVerilog

1. Functions & Tasks in System Verilog (call by value )

XLAT (Translate ) instruction in 8086 microprocessor

5. Response of Low pass RC circuit for a Pulse input

6. High Pass RC (HPRC) circuit acts as Differentiator & Condition for perfect differentiation

7. Low Pass RC (LPRC) circut as Integrator and condition for perfect integration

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4 Response of Low Pass RC Circuit when Step input is applied PDC JNTUH R13

3 .Operation of a Capacitor (How it charges and discharges) PDC JNTU R13

2 Response of LPRC circuit when a sinusoidal input applied - PDC JNTUH R13

1 Pulse & Digital Circuits (PDC) - Introduction to syllabus JNTUH (R13)

4.Bi-directional Diode Sampling Gate - Operation, gain, Vcmin and Vnmin (JNTU PDC)

3.Bi-directional Sampling Gate with provision to remove Pedestal - Operation (JNTU PDC)

1.Unidirectional Diode Sampling Gates - Operation, Advantages & Disadvantages (JNTU PDC)

2.Emitter Coupled Bi directional Sampling Gates (Pulse & Digital Circuits JNTU)

Why electron mobility is more than hole mobility ?

Difference between free electron, bound electron, hole, hole current and electron current

why intrinsic carrier concentration of germanium is larger than silicon ?

Is extrinsic semiconductor electrically neutral or not ?

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GATE 2015 Question paper with Answer Key CSE (7th FEB Afternoon)

GATE 2015 Question paper with Answer Key CSE (7th FEB Forenoon)

GATE 2015 Question paper with Answer Key Civil (8th FEB Forenoon)

GATE 2015 Question paper with Answer Key Mechanical (01st FEB Forenoon)

GATE 2015 Question paper with Answer Key Mechanical (01st FEB Afternoon)

GATE 2015 Question paper with Answer Key CSE (8th FEB Forenoon)

GATE 2015 Question paper with Answer Key Mechanical (31st JAN Afternoon)

GATE 2015 Instrumentaiton Paper with Answer Key

GATE 2015 EEE Question paper with Answer Key (7th Feb Forenoon)

GATE 2015 EEE Question paper with Answer Key (7th Feb Afternoon)

GATE 2015 Question Paper EC 1st Feb Forenoon with Answer key

GATE 2015 ECE Question paper with Answer key - 31st January Forenoon

gate 2015 question paper ec with Answer Key - 31st January Afternoon session

What is meant by Height of Potential Barrier ? (Energy Band diagram of PN junction )

AC amplifier (Invering and Non-inverting mode) and AC Buffer using OP-AMP - A Conceptual Lecture

Instrumentation Amplifier ( A Conceptual Lecture) - Limitaitons of Differential Amplifier

Answer Key UPSC IES 2014 Electronics & Telecommunication Engineering Objective Paper - II

ISRO 2014 Electronics Answer Key for all 80 Questions

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ISRO 2012 Electronics Answer Key

ISRO 2011 Electronics Answer Key

ISRO 2009 Electronics Answer Key

ISRO 2010 Electronics Answer Key

ISRO 2008 Answer Keys Electronics

ISRO 2007 Answer Keys Electronics

ISRO 2006 Electronics Answer Key

GATE 2014 CSE Answer Key - 02nd March Morning Session

ISRO 2013 Electronics - Answer Key

GATE 2014 CSE paper with Answer Key - 02 March Evening Session

GATE 2014 EEE paper - 02nd March Morning Session Answer Key

GATE 2014 Instrumentation Paper Answer Key(02nd FEB Evening Session)